id	summary	reporter	owner	description	type	status	priority	milestone	component	version	resolution	keywords	cc
1369	Motion vector wrapping with AMVR	bheng		"Motion vector wrapping to 18-bit range, like below, occurs in several places.

   ""uLX[ 0 ] = ( mvpLX[ 0 ] + mvdLX[ 0 ] + 2^18^ ) % 2^18^
   mvLX[ 0 ][ 0 ][ 0 ] = ( uLX[ 0 ]  >=  2^17^ ) ? ( uLX[ 0 ] − 2^18^ ) : uLX[ 0 ]""

The logic used here assumes (mvpLX[ 0 ] + mvdLX[ 0 ]) is always less than or equal to -2^18^, otherwise the result is undefined (modulo not defined for negative x).

However, I don't believe this assumption is guaranteed to be true.


   The MVD range is 18 bits, from the following restriction:

      ""The value of lMvd[ compIdx ] shall be in the range of −2^17^ to 2^17^ − 1, inclusive."" 


   This value is assigned to MvdL0:

      ""MvdL0[ x0 ][ y0 ][ compIdx ] is set equal to lMvd[ compIdx ]""

   then MvdL0 is modified by AmvrShift (which could be 6).

      ""MvdL0[ x0 ][ y0 ][ 0 ] = MvdL0[ x0 ][ y0 ][ 0 ]  << AmvrShift""

   and the resulting MvdL0 could be -2^23^. In which case, the wrapping logic above would fail to work correctly. 

I have not found any further restriction on MvdL0 after AMVR is applied.  Just that original restriction on lMvd.  

There's a note that says the resulting vectors are in the 18-bit range, but that is just an informational statement, not a guarantee or a conformance restriction.

I believe changing all the ""+ 2^18^"" to ""+ 2^24^"" would be one way to solve the problem."	defect	closed	minor		spec	VVC D10 vG	fixed		ksuehring bbross XiangLi fbossen jvet@…