Opened 5 years ago
Last modified 4 years ago
#507 new defect
Signalling of RPL in slice header of IDR picture
| Reported by: | hendry197 | Owned by: | |
|---|---|---|---|
| Priority: | minor | Milestone: | |
| Component: | VTM | Version: | VTM-6.1 |
| Keywords: | IDR, RPL | Cc: | ksuehring, XiangLi, fbossen, jvet@… |
Description
When sps_idr_rpl_present_flag is equal to 1, RPL signaling is present SH of IDR pictures. This RPL signaling can be local RPL or by referencing to the candidate RPL structures in SPS.
Current implementation does not allow RPL signaling by referencing to available candidates RPL structures in SPS.
The following MR provides fix for the issue.
https://vcgit.hhi.fraunhofer.de/jvet/VVCSoftware_VTM/merge_requests/919
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