Opened 5 years ago
Closed 5 years ago
#618 closed defect (fixed)
Mismatch between SW and spec on syntax merge_triangle_idx1
Reported by: | wzeng | Owned by: | |
---|---|---|---|
Priority: | minor | Milestone: | |
Component: | spec | Version: | |
Keywords: | Cc: | ksuehring, bbross, XiangLi, fbossen, jvet@… |
Description
In spec text D7 v9, syntax merge_triangle_idx1 is sent unconditionally
if( !ciip_flag[ x0 ][ y0 ] && MaxNumTriangleMergeCand > 1 ) {
merge_triangle_split_dir[ x0 ][ y0 ]
merge_triangle_idx0[ x0 ][ y0 ]
merge_triangle_idx1[ x0 ][ y0 ]
}
But in VTM code, merge_triangle_idx1 is gated by condition (MaxNumTriangleMergeCand > 2).
Suggest to align the text to VTM as follows.
if( !ciip_flag[ x0 ][ y0 ] && MaxNumTriangleMergeCand > 1 ) {
merge_triangle_split_dir[ x0 ][ y0 ]
merge_triangle_idx0[ x0 ][ y0 ]
if ( MaxNumTriangleMergeCand > 2 )
merge_triangle_idx1[ x0 ][ y0 ]
}
Change history (2)
comment:1 Changed 5 years ago by yjchang
comment:2 Changed 5 years ago by bbross
- Resolution set to fixed
- Status changed from new to closed
Thanks for reporting.
This will be fixed JVET-P2001-vB.
I confirm the suggestion would make spec syntax more readable, and avoid any misunderstanding.