Mismatch between spec and VTM on assignment of ctxInc to amvr_precision_idx

[wangyang.cs]

There is a mismatch between spec and VTM on assignment of ctxInc to amvr_precision_idx.
In JVET-R2001-vA, according to Table 126, 1 or 2 bins are used when amvr_precision_idx is context coded:
Affine: 1 bin
IBC: 1 bin
Non-affine, non-IBC: 2 bins

Table 126 – Syntax elements and associated binarizations

Syntax structure	Syntax element	Binarization
		Process	Input parameters
coding_unit()	amvr_precision_idx[ ][ ]	RT	cMax = ( inter_affine_flag = = 0 && CuPredMode[ 0 ][ x0 ][ y0 ] != MODE_IBC ) ? 2 : 1, cRiceParam = 0

Two ctxIncs are assigned to the bins of amvr_precision_idx. One is assigned to the first bin, the other is assigned to the second bin (if any).

Table 131 – Assignment of ctxInc to syntax elements with context coded bins

Syntax element	binIdx
	0	1	2	3	4	>=5
amvr_precision_idx[ ][ ]	0	1	na	na	na	na

However, in VTM-8.0, three ctxIncs are assigned to the bins of amvr_precision_idx depending on whether current block is affine or IBC mode.

In void CABACReader::imv_mode()

if ( cu.affine )
{
  return;
}
const SPS *sps = cu.cs->sps;
unsigned value = 0;
if (CU::isIBC(cu))
  value = 1;
else
  value = m_BinDecoder.decodeBin( Ctx::ImvFlag( 0 ) );
DTRACE( g_trace_ctx, D_SYNTAX, "imv_mode() value=%d ctx=%d\n", value, 0 );
cu.imv = value;
if( sps->getAMVREnabledFlag() && value )
{
  if (!CU::isIBC(cu))
  {
    value = m_BinDecoder.decodeBin(Ctx::ImvFlag(4));
    DTRACE(g_trace_ctx, D_SYNTAX, "imv_mode() value=%d ctx=%d\n", value, 4);
    cu.imv = value ? 1 : IMV_HPEL;   
  }
  if (value)
  {
    value = m_BinDecoder.decodeBin( Ctx::ImvFlag( 1 ) );
    DTRACE( g_trace_ctx, D_SYNTAX, "imv_mode() value=%d ctx=%d\n", value, 1 );
    value++;
    cu.imv = value;
  }
}

For non-affine and non-IBC, 2 bins are used to code amvr_precision_idx. Ctx::ImvFlag(4) and Ctx::ImvFlag( 1 ) assigned to the first bin and the second bin.
For IBC, 1 bin is used to code amvr_precision_idx. Ctx::ImvFlag( 1 ) is also assigned to the first bin of amvr_precision_idx. The same ctxInc is also assigned to the second bin for non-affine and non-IBC.

In void CABACReader::affine_amvr_mode()

unsigned value = 0;
value = m_BinDecoder.decodeBin( Ctx::ImvFlag( 2 ) );
DTRACE( g_trace_ctx, D_SYNTAX, "affine_amvr_mode() value=%d ctx=%d\n", value, 2 );
if( value )
{
  value = m_BinDecoder.decodeBin( Ctx::ImvFlag( 3 ) );
  DTRACE( g_trace_ctx, D_SYNTAX, "affine_amvr_mode() value=%d ctx=%d\n", value, 3 );
  value++;
}

For affine, 1 bin is used to code amvr_precision_idx. Ctx::ImvFlag( 3 ) is assigned to the first bin.

Suggest changes in JVET-R2001-vA as follows:

9.3.2.2 Initialization process for context variables
Table 51 – Association of ctxIdx and syntax elements for each initializationType
in the initialization process

Syntax structure	Syntax element	ctxTable	initType
coding_unit( )	amvr_precision_idx[ ][ ]	Table 89	0..12	23..35	46..58

Table 89 – Specification of initValue and shiftIdx for ctxIdx of amvr_precision_idx

Initialization variable	ctxIdx of amvr_precision_idx
	0	1	2	3	4	5	6	7	8
initValue	EP	EP	EP	EP	EP	EP	EP	EP	EP
shiftIdx	0	0	0	0	0	0	0	0	0

9.3.4.2 Derivation process for ctxTable, ctxIdx and bypassFlag
9.3.4.2.1 General
Table 131 – Assignment of ctxInc to syntax elements with context coded bins

Syntax element	binIdx
	0	1	2	3	4	>=5
amvr_precision_idx[ ][ ]	0(CuPredMode[ 0 ][ x0 ][ y0 ] == MODE_IBC) ? 1 : (inter_affine_flag = = 0 ? 0 : 2)	1	na	na	na	na

[bbross]

Good catch, thanks!

This will be fixed in first verison of D10.